Types of exceptions include resets, interrupts, and faults.The exception handling is sudden and asynchronous to the execution of the instruction.However, since the only exception is a fault, which is caused by an error condition caused by the execution of the instruction, the fault is basically generated synchronously with the instruction that caused it.However, hardware faults such as bus access errors may occur asynchronously with instructions. The table below shows the types of exceptions.
order of priority
The higher up you go in the table below, the higher your priority will be. The most expensive is the reset.If the Cortex-M3 is reset in any state, it will perform the operations indicated in the reset vector.The priority of the reset is -3.Here, as you may have noticed, the priority order is not 0 being the highest, but -3 being the highest setting.NMI is -2, hard fault is -1, and memory management is 0.
When describing the “NVIC register (See Part 17), the priority of exception handling is indicated by this number.There is a register that can raise the priority order to 0, but it doesn’t become the highest priority, so please don’t be mistaken.In the table, there is a column called “Types of Priorities”.You cannot change the priority order of exception handling that is “fixed” here, but you can change the priority order of The exception handling that is “configurable” can be changed by the register.This is the main function of NVIC (Refer to Part 13), this is the change in interrupt priority described in ②.
Major exception handling
No. 1 to 15 are exceptions caused by Cortex-M3. The exceptions are described in the table.No. 16 to 255 are external exceptions when viewed from Cortex-M3.In other words, it is assigned to interrupt processing of microcomputer peripheral functions such as timers, communication functions (SP, I2C, UART, etc.), analog functions (DAC, ADC, etc.), etc.These exceptions will be assigned by the microcontroller vendor for each on-board peripheral function.
No. | Types of exceptions | order of priority | Types of priorities. | Content |
---|---|---|---|---|
1 | reset | -3(Highest) | fixed | reset |
2 | NMI | -2 | fixed | Non-maskable interrupts (unmaskable interrupts) |
3 | hard fault | -1 | fixed | Default (all) faults when priority relationships or other handlers are disabled and cannot be executed. |
4 | memory management | 0 | Set the possibility | Access to an MPU violation (MPU inconsistency) or an incorrect location (access violation or mismatch) |
5 | bus fault | 1 | configurable | Receiver Error on AHB Interface Prefetch faults, memory access faults, and other address and memory-related faults. |
6 | Dosage Fault | 2 | configurable | Exceptions due to program errors For example, executing an undefined instruction or attempting a transition to an incorrect state |
7-10 | reservation | – | – | — |
11 | SVCall (Supervisor call) | 3 | configurable | System Service Call by SVC Instruction |
12 | debugging monitor | 4 | setting>possible | Debug monitoring when not in the hold Breakpoints, watchpoints and external debugging |
13 | reservation | – | – | — |
14 | PendSV | 5 | configurable | Pending requests for system services |
15 | SYSTICK | 6 | configurable | System Timer Notification |
16 | external interrupt #0 | 7 | configurable | external interrupt #0 |
…… | ………………… | ………………… | configurable | ………………… |
255 | external interrupt #239 | 246 | configurable | external interrupt #239 |
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